Wednesday, March 17, 2010

Scale factor

You wouldn't think this would be so hard. From now on, I'll just remember the cicadas in the following link:

http://www.learner.org/courses/learningmath/measurement/session2/part_b/

Also, this treatise was so well written that even if it didn't answer my question there's a lot to learn from it:

http://www.markcad.com/autocad/drawingscale.htm

kcore file

on a Redhat system, trying to find the cause of / filling up unexpectedly, I ran into this file named /proc/kcore that was quite big. Mysteriously, it couldn't be deleted, even by root. Which was good, since it turns out that it's actually a device. You'd think that kcore would be a core file that had to do with KDE, but in fact it's a wacky built-in that allows a person to dump active memory as though it were a file (using tools like od). Forums across the tubes are full of people who jumped to the same wrong conclusion that I did, and kind folks who explained the answer in ways interesting enough to preserve links to:

https://lists.ubuntu.com/archives/kubuntu-users/2005-May/000890.html
http://www.justlinux.com/forum/showthread.php?t=94027
http://www.linuxforums.org/forum/suse-linux-help/145869-kcore-file.html
http://www.linuxquestions.org/questions/ubuntu-63/prockcore-file-is-getting-bigger-and-bigger.-626078/
http://www.unix.com/unix-advanced-expert-users/107375-can-we-delete-kcore-file.html

Divide By 5 counter

For an FPGA, getting specific frequencies from the system clock involves things like "divide by 5". This turns out to be a little tricky if you want a real clock output with something resembling a 50% duty cycle. Some answers that I recently stumbled on include.

1. Use a PLL module if the FPGA has them, since they have multipliers and dividers built in that can make multiples or fractions of the input clock.

2. Use two binary dividers and combine them in novel ways that I don't completely understand yet. However, the following papers seem to explain it:

A SNUG paper from 2002 by ST Microelectronics, the original of which seems to not have the text contained in the still-barely-readable google cache:

http://74.125.95.132/search?q=cache:XH_x-8eBw-4J:www.scribd.com/doc/6868408/Clock-Dividers+vhdl+%22divide+by+5%22+counter+example&cd=6&hl=en&ct=clnk&gl=us

(original, seems to be working now: http://www.scribd.com/doc/6868408/Clock-Dividers)

Here seems to be some examples similar to the above, except the code makes no sense to me (particularly if x=n then x=x+1):

http://www.asic-world.com/examples/vhdl/counters.html

The first question in this quiz with answers looks interesting, but the problem in the outputs is not entirely clear:
http://www.ece.stevens-tech.edu/~bmcnair/SwTh-Sum04/quiz4-with-answers.pdf